- xxxx xxxx 8-bit operation (instruction)
- 0000 0000 nop

- [OPC] [OPD]
	- Opcode: what operation
	- Operand: what value should we use for it

- 1xxx xaaa ALU
	- a: OPD
	- x: ALU CMD
		- 00xx: Arithmetic
			- 0000: Add
			- 0001: Sub
		- 01xx: Gates
			- 0100: NOT
			- 0101: AND
			- 0110: OR
			- 0111: XOR
		- 10xx: Shifts
			- 1000: LSH
			- 1001: LRSH
			- 1010: ARSH
		- 11xx: Cycles
			- 1100: CYCL
			- 1101: CYCR

- 0xxx xaaa MEM
	- 01bb baaa MOV:
		- b: SRC
		- a: DST

	- 001i raaa LDA: 
		- a: DST
		- i: addressing mode
			- 0: direct register [from mar] [to a]
			- 1: pc relative [to a]

// direct/absolute for RISC is too complex (not enough space for address in operand)
// indexed would be too complex (requires extra registers and addition)
// indirect = direct reg + direct reg (which is what happens anyway on real cpus)

		- r: memory medium
			- 0: from rom
			- 1: from ram

	- 0000 1aaa STR: [to addr in MAR in RAM]
		- a: SRC

	- 0001 0znc JMP (Branch): [to addr in MAR]
		- znc: Zero Negative Carry

	- 0001 1aaa CMP: [compare to ACC]
		- a: OPD